Crynodeb
In this paper, we apply the sorting network theory to construct an analog rank order filter. We present a voltage mode CMOS two-input sorting element and arrange these to form a rank order filter. The resulting circuit is simple and is a high-speed, high-precision design. Although the transistor count is moderately higher than other designs, the proposed circuit simultaneously outputs signals of all ranks rather than of just one specified rank. We also develop a slightly modified design which calculates the rank of a given signal. We present reports of simulations to verify the performance of the device.
| Iaith wreiddiol | Saesneg |
|---|---|
| Tudalennau (o-i) | 201-204 |
| Nifer y tudalennau | 4 |
| Cyfnodolyn | IETE Journal of Research |
| Cyfrol | 55 |
| Rhif cyhoeddi | 5 |
| Dynodwyr Gwrthrych Digidol (DOIs) | |
| Statws | Cyhoeddwyd - 01 Medi 2009 |