Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory

Omer Qadir; Jerry Liu; Jon Timmis; Gianluca Tempesti; Andy Tyrrell

doi:10.1109/CEC.2011.5949620

Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory

Omer Qadir^*, Jerry Liu, Jon Timmis, Gianluca Tempesti, Andy Tyrrell

^*Awdur cyfatebol y gwaith hwn

Adran Cyfrifiadureg

University of York

Allbwn ymchwil: Pennod mewn Llyfr/Adroddiad/Trafodion Cynhadledd › Trafodion Cynhadledd (Nid-Cyfnodolyn fathau)

8 Dyfyniadau (Scopus)

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This paper details an extension to an architecture for robust bidirectional hetero-associative recall. Our proposed Protein Processor Associative Memory (PPAM) is fundamentally different from the traditional processing methods which use arithmetic operations and consequently Arithmetic and Logic Units (ALUs). In this paper, we improve on our initial work addressing concerns surrounding hardware implementation. We present the improved computational architecture, coupled with a corresponding hardware architecture for implementation. Results of applying the hardware implementation on a small dataset are included, along with reports from synthesis tools about hardware utilisation.

Iaith wreiddiol	Saesneg
Teitl	2011 IEEE Congress of Evolutionary Computation, CEC 2011
Cyhoeddwr	IEEE Press
Tudalennau	208-215
Nifer y tudalennau	8
ISBN (Argraffiad)	9781424478347
Dynodwyr Gwrthrych Digidol (DOIs)	https://doi.org/10.1109/CEC.2011.5949620
Statws	Cyhoeddwyd - 2011
Digwyddiad	2011 IEEE Congress of Evolutionary Computation, CEC 2011 - New Orleans, LA, Unol Daleithiau America Hyd: 05 Meh 2011 → 08 Meh 2011

Cyfres gyhoeddiadau

Enw	2011 IEEE Congress of Evolutionary Computation, CEC 2011

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Cynhadledd	2011 IEEE Congress of Evolutionary Computation, CEC 2011
Gwlad/Tiriogaeth	Unol Daleithiau America
Dinas	New Orleans, LA
Cyfnod	05 Meh 2011 → 08 Meh 2011

Mynediad at Ddogfen

10.1109/CEC.2011.5949620

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Qadir, O., Liu, J., Timmis, J., Tempesti, G., & Tyrrell, A. (2011). Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory. Yn 2011 IEEE Congress of Evolutionary Computation, CEC 2011 (tt. 208-215). erthygl 5949620 (2011 IEEE Congress of Evolutionary Computation, CEC 2011). IEEE Press. https://doi.org/10.1109/CEC.2011.5949620

@inproceedings{6547112115d74b67bd5bd287a9ee67b9,

title = "Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory",

abstract = "This paper details an extension to an architecture for robust bidirectional hetero-associative recall. Our proposed Protein Processor Associative Memory (PPAM) is fundamentally different from the traditional processing methods which use arithmetic operations and consequently Arithmetic and Logic Units (ALUs). In this paper, we improve on our initial work addressing concerns surrounding hardware implementation. We present the improved computational architecture, coupled with a corresponding hardware architecture for implementation. Results of applying the hardware implementation on a small dataset are included, along with reports from synthesis tools about hardware utilisation.",

author = "Omer Qadir and Jerry Liu and Jon Timmis and Gianluca Tempesti and Andy Tyrrell",

year = "2011",

doi = "10.1109/CEC.2011.5949620",

language = "English",

isbn = "9781424478347",

series = "2011 IEEE Congress of Evolutionary Computation, CEC 2011",

publisher = "IEEE Press",

pages = "208--215",

booktitle = "2011 IEEE Congress of Evolutionary Computation, CEC 2011",

address = "United States of America",

note = "2011 IEEE Congress of Evolutionary Computation, CEC 2011 ; Conference date: 05-06-2011 Through 08-06-2011",

}

Qadir, O, Liu, J, Timmis, J, Tempesti, G & Tyrrell, A 2011, Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory. yn 2011 IEEE Congress of Evolutionary Computation, CEC 2011., 5949620, 2011 IEEE Congress of Evolutionary Computation, CEC 2011, IEEE Press, tt. 208-215, 2011 IEEE Congress of Evolutionary Computation, CEC 2011, New Orleans, LA, Unol Daleithiau America, 05 Meh 2011. https://doi.org/10.1109/CEC.2011.5949620

Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory. / Qadir, Omer; Liu, Jerry; Timmis, Jon et al.
2011 IEEE Congress of Evolutionary Computation, CEC 2011. IEEE Press, 2011. t. 208-215 5949620 (2011 IEEE Congress of Evolutionary Computation, CEC 2011).

Allbwn ymchwil: Pennod mewn Llyfr/Adroddiad/Trafodion Cynhadledd › Trafodion Cynhadledd (Nid-Cyfnodolyn fathau)

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T1 - Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory

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N2 - This paper details an extension to an architecture for robust bidirectional hetero-associative recall. Our proposed Protein Processor Associative Memory (PPAM) is fundamentally different from the traditional processing methods which use arithmetic operations and consequently Arithmetic and Logic Units (ALUs). In this paper, we improve on our initial work addressing concerns surrounding hardware implementation. We present the improved computational architecture, coupled with a corresponding hardware architecture for implementation. Results of applying the hardware implementation on a small dataset are included, along with reports from synthesis tools about hardware utilisation.

AB - This paper details an extension to an architecture for robust bidirectional hetero-associative recall. Our proposed Protein Processor Associative Memory (PPAM) is fundamentally different from the traditional processing methods which use arithmetic operations and consequently Arithmetic and Logic Units (ALUs). In this paper, we improve on our initial work addressing concerns surrounding hardware implementation. We present the improved computational architecture, coupled with a corresponding hardware architecture for implementation. Results of applying the hardware implementation on a small dataset are included, along with reports from synthesis tools about hardware utilisation.

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U2 - 10.1109/CEC.2011.5949620

DO - 10.1109/CEC.2011.5949620

M3 - Conference Proceeding (Non-Journal item)

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SN - 9781424478347

T3 - 2011 IEEE Congress of Evolutionary Computation, CEC 2011

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PB - IEEE Press

T2 - 2011 IEEE Congress of Evolutionary Computation, CEC 2011

Y2 - 5 June 2011 through 8 June 2011

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Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory

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