Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory

Omer Qadir*, Jerry Liu, Jon Timmis, Gianluca Tempesti, Andy Tyrrell

*Awdur cyfatebol y gwaith hwn

Allbwn ymchwil: Pennod mewn Llyfr/Adroddiad/Trafodion CynhadleddTrafodion Cynhadledd (Nid-Cyfnodolyn fathau)

8 Dyfyniadau(SciVal)

Crynodeb

This paper details an extension to an architecture for robust bidirectional hetero-associative recall. Our proposed Protein Processor Associative Memory (PPAM) is fundamentally different from the traditional processing methods which use arithmetic operations and consequently Arithmetic and Logic Units (ALUs). In this paper, we improve on our initial work addressing concerns surrounding hardware implementation. We present the improved computational architecture, coupled with a corresponding hardware architecture for implementation. Results of applying the hardware implementation on a small dataset are included, along with reports from synthesis tools about hardware utilisation.

Iaith wreiddiolSaesneg
Teitl2011 IEEE Congress of Evolutionary Computation, CEC 2011
CyhoeddwrIEEE Press
Tudalennau208-215
Nifer y tudalennau8
ISBN (Argraffiad)9781424478347
Dynodwyr Gwrthrych Digidol (DOIs)
StatwsCyhoeddwyd - 2011
Digwyddiad2011 IEEE Congress of Evolutionary Computation, CEC 2011 - New Orleans, LA, Unol Daleithiau America
Hyd: 05 Meh 201108 Meh 2011

Cyfres gyhoeddiadau

Enw2011 IEEE Congress of Evolutionary Computation, CEC 2011

Cynhadledd

Cynhadledd2011 IEEE Congress of Evolutionary Computation, CEC 2011
Gwlad/TiriogaethUnol Daleithiau America
DinasNew Orleans, LA
Cyfnod05 Meh 201108 Meh 2011

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