Hardware architecture for a bidirectional hetero-associative Protein Processing Associative Memory

Omer Qadir*, Jerry Liu, Jon Timmis, Gianluca Tempesti, Andy Tyrrell

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference Proceeding (Non-Journal item)

8 Citations (Scopus)

Abstract

This paper details an extension to an architecture for robust bidirectional hetero-associative recall. Our proposed Protein Processor Associative Memory (PPAM) is fundamentally different from the traditional processing methods which use arithmetic operations and consequently Arithmetic and Logic Units (ALUs). In this paper, we improve on our initial work addressing concerns surrounding hardware implementation. We present the improved computational architecture, coupled with a corresponding hardware architecture for implementation. Results of applying the hardware implementation on a small dataset are included, along with reports from synthesis tools about hardware utilisation.

Original languageEnglish
Title of host publication2011 IEEE Congress of Evolutionary Computation, CEC 2011
PublisherIEEE Press
Pages208-215
Number of pages8
ISBN (Print)9781424478347
DOIs
Publication statusPublished - 2011
Event2011 IEEE Congress of Evolutionary Computation, CEC 2011 - New Orleans, LA, United States of America
Duration: 05 Jun 201108 Jun 2011

Publication series

Name2011 IEEE Congress of Evolutionary Computation, CEC 2011

Conference

Conference2011 IEEE Congress of Evolutionary Computation, CEC 2011
Country/TerritoryUnited States of America
CityNew Orleans, LA
Period05 Jun 201108 Jun 2011

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