Nominal-yield-area tradeoff in automatic synthesis of analog circuits: A genetic programming approach using immune-inspired operators

Piero Conca*, Giuseppe Nicosia, Giovanni Stracquadanio, Jon Timmis

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference Proceeding (Non-Journal item)

12 Citations (SciVal)


The synthesis of analog circuits is a complex and expensive task; whilst there are various approaches for the synthesis of digital circuits, analog design is intrinsically more difficult since analog circuits process voltages in a continuous range. In the field of analog circuit design, the genetic programming approach has received great attention, affording the possibility to design and optimize a circuit at the same time. However, these algorithms have limited industrial relevance, since they work with ideal components. Starting from the well known results of Koza and co-authors, we introduce a new evolutionary algorithm, called elitist Immune Programming (EIP), that is able to synthesize an analog circuit using industrial components series in order to produce reliable and low cost circuits. The algorithm has been used for the synthesis of low-pass filters; the results were compared with the genetic programming, and the analysis shows that EIP is able to design better circuits in terms of frequency response and number of components. In addition we conduct a complete yield analysis of the discovered circuits, and discover that EIP circuits attain a higher yield than the circuits generated via a genetic programming approach, and, in particular, the algorithm discovers a Pareto Front which respects nominal performance (sizing), number of components (area) and yield (robustness).

Original languageEnglish
Title of host publicationProceedings - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
Number of pages8
Publication statusPublished - 2009
Event2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009 - San Francisco, CA, United States of America
Duration: 29 Jul 200901 Aug 2009

Publication series

NameProceedings - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009


Conference2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
Country/TerritoryUnited States of America
CitySan Francisco, CA
Period29 Jul 200901 Aug 2009


  • circuit synthesis
  • analog circuits
  • genetic programming
  • algorithm design and analysis
  • digital circuits
  • voltage
  • design optimization
  • evolutionary computation
  • costs
  • low pass filters

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