TY - GEN
T1 - Rhino blocks pulse-Doppler radar framework
AU - Winberg, Simon
AU - Mishra, Amit
AU - Raw, Bruce
PY - 2012/12/6
Y1 - 2012/12/6
N2 - This paper concerns development of a pulsed-Doppler radar system prototyping framework designed for deployment on the Reconfigurable Hardware Interface for computiNg and radiO (Rhino) platform. The Rhino platform combines a low-cost Field Programmable Gate Array (FPGA) and an ARM processor, designed for use in prototyping Software Defined Radio applications. The Rhino is intended as both a training platform and research tool for skills development in this field [1]. The project reported on in this paper involves develop of a software and gateware application framework for Rhino to facilitate lab-based testing and hardware-in-the-loop simulation for radar applications. The framework comprises a collection of 'radar blocks', programmed in a hardware description language, that are connected together and run on the Rhino's FPGA, and controlled by Linux-based embedded software on the ARM. The performance of a standard pulsed-Doppler radar system was tested. The results show the functions operate correctly, but the data rates are restrictive. The conclusions discuss advantages and disadvantages of the system, together with further plans for improving the framework.
AB - This paper concerns development of a pulsed-Doppler radar system prototyping framework designed for deployment on the Reconfigurable Hardware Interface for computiNg and radiO (Rhino) platform. The Rhino platform combines a low-cost Field Programmable Gate Array (FPGA) and an ARM processor, designed for use in prototyping Software Defined Radio applications. The Rhino is intended as both a training platform and research tool for skills development in this field [1]. The project reported on in this paper involves develop of a software and gateware application framework for Rhino to facilitate lab-based testing and hardware-in-the-loop simulation for radar applications. The framework comprises a collection of 'radar blocks', programmed in a hardware description language, that are connected together and run on the Rhino's FPGA, and controlled by Linux-based embedded software on the ARM. The performance of a standard pulsed-Doppler radar system was tested. The results show the functions operate correctly, but the data rates are restrictive. The conclusions discuss advantages and disadvantages of the system, together with further plans for improving the framework.
KW - application framework
KW - field programmable gate array
KW - reconfigurable computing
KW - software defined radio
KW - technical skills development
UR - http://www.scopus.com/inward/record.url?scp=84874433817&partnerID=8YFLogxK
U2 - 10.1109/PDGC.2012.6449939
DO - 10.1109/PDGC.2012.6449939
M3 - Conference Proceeding (Non-Journal item)
AN - SCOPUS:84874433817
SN - 978-1-4673-2922-4
T3 - Proceedings of 2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing, PDGC 2012
SP - 876
EP - 881
BT - Proceedings of 2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing, PDGC 2012
PB - IEEE Press
T2 - 2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing, PDGC 2012
Y2 - 6 December 2012 through 8 December 2012
ER -